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HD151TS309ARP spread spectrum clock for emi solution ade-205-702b (z) preliminary rev.2 nov. 2002 description the HD151TS309ARP is a high- performance spread spectrum clock m odulator. it is suitable for low emi solution. features ? supports 10 mhz to 60 mhz operation. (designed for xin = 24 mhz and 48 mhz) ? 1 copy of clock out with spread spectrum modulation @3.3 v ? 1 copy of reference clock @3.3 v ? programmable spread spectrum modulation (?0.5%, ?1.0%, ?3.0% central spread modulation and spread spectrum disable mode.) ? sop?8pin key specifications ? supply voltages : vdd = 3.3 v0.165 v ? ta = 0 to 70c operating range ? clock output duty cycle = 505% ? cycle to cycle jitter = 250 ps typ. ? ordering information part name package type package code package abbreviation taping abbreviation (quantity) HD151TS309ARPel sop-8 pin (jedec) fp-8dc rp el (2,500 pcs / reel) note: please consult the sales office for the above package availability.
HD151TS309ARP rev.2, nov. 2002, page 2 of 12 block diagram synthesizer mode control 1/n osc ssc modulator vdd clkout sscclkout gnd sel0 xin xout sel1 1/m r=100 k ? r=1 m ? r=100 k ? pin arrangement (top view) 8 vdd 1 7 sel0 6 sscclkout 5 gnd xin 2 xout 3 sel1 4 clkout
HD151TS309ARP rev.2, nov. 2002, page 3 of 12 ssc function table sel1 :0 spread percentage 0 0 ?1.0% 0 1 ?3.0% 1 0 ssc off 1 1 ?0.5% note: 1.5% ssc is selected for default by internal pull-up & down resistors. clock frequency table xin(mhz) sscclkout(mhz) clkout(mhz) 48 48 *1 48 *2 24 24 *1 24 *2 notes: 1. with spread spectrum modulation. 2. without spread spectrum modulation. pin descriptions pin name no. type description gnd 5 ground gnd pin vdd 8 power power supplies pin. normally 3.3 v. clkout 4 output normally 3.3 v reference clock output. *1 sscclkout 6 output spread spectrum modulated clock output. xin 1 input oscillator input. xout 2 output oscillator output. sel0 7 input ssc mode select pin. lvcmos level input. pull-up by internal resistor. (100 k ? ). sel1 3 input ssc mode select pin. lvcmos level input. pull?down by internal resistor (100 k ? ). notes: 1. if clkout is unused, then this pin should be unconnected.
HD151TS309ARP rev.2, nov. 2002, page 4 of 12 absolute maximum ratings item symbol ratings unit conditions supply voltage vdd ?0.5 to 4.6 v input voltage v i ?0.5 to 4.6 v output voltage *1 v o ?0.5 to vdd+0.5 v input clamp current i ik ?50 ma v i < 0 output clamp current i ok ?50 ma v o < 0 continuous output current i o 50 ma v o = 0 to vdd maximum power dissipation at ta = 55c (in still air) 0.7 w storage temperature t stg ?65 to +150 c notes: stresses beyond those listed under ?absol ute maximum ratings? may cause permanent damage to the device. these are stress ratings only, an d functional operation of the device at these or any other conditions beyond those indicated un der ?recommended operating conditions? is not implied. exposure to absolute maximum rated co nditions for extended periods may affect device reliability. 1. the input and output negative voltage ratings may be exceeded if the input and output clamp current ratings are observed. recommended operating conditions item symbol min typ max unit conditions supply voltage vdd 3.135 3.3 3.465 v dc input signal voltage ?0.3 ? vdd+0.3 v high level input voltage v ih 2.0 ? vdd+0.3 v low level input voltage v il ?0.3 ? 0.8 v operating temperature t a 0?70c input clock duty cycle 45 50 55 %
HD151TS309ARP rev.2, nov. 2002, page 5 of 12 dc electrical characteristics ta = 0 to 70c, vdd = 3.3 v5% item symbol min typ max unit test conditions input low voltage v il ??0.8v input high voltage v ih 2.0 ? ? v input current i i ??10av i = 0 v or 3.465 v, vdd = 3.465 v, xin pin ??100 v i = 0 v or 3.465 v, vdd = 3.465 v, sel0, sel1 pins input slew rate 1 ? 4 v / ns 20% ? 80% input capacitance c i ? ? 4 pf sel0, sel1 operating current ? 7 ? ma xin = 24 mhz, c l = 0 pf, vdd = 3.3 v dc electrical characteristics / clock output & ssc clock output ta = 0 to 70c, vdd = 3.3 v5% item symbol min typ max unit test conditions v oh 3.1 ? ? v i oh = ?1 ma, vdd = 3.3 v output voltage v ol ??50 mvi ol = 1 ma, vdd = 3.3 v i oh ? ?30 ? v oh = 1.5 v output current* 1 i ol ?30? ma v ol = 1.5 v note: 1. parameters are target of desi gn. not 100% tested in production.
HD151TS309ARP rev.2, nov. 2002, page 6 of 12 ac electrical characteristics / cl ock output & ssc clock output ta = 25c, vdd = 3.3 v, c l = 15 pf item symbol min typ max unit test conditions notes ? | 250 | | 300 | sscclkout, 24 mhz ? | 250 | | 300 | sscclkout, 48 mhz sscoff sel1:0 = 10 fig1 ? | 250 | | 300 | sscclkout, 24 mhz ? | 250 | | 300 | sscclkout, 48 mhz ssc= ?0.5% sel1:0 = 11 fig1 ? | 250 | | 300 | sscclkout, 24 mhz ? | 250 | | 300 | sscclkout, 48 mhz ssc= ?3.0% sel1:0 = 01 fig1 cycle to cycle jitter *1, 2 t ccs ? | 250 | | 300 | ps clkout, 24 mhz & 48mhz fig1 23.8 ? 24.2 sscclkout, xin = 24 mhz 47.3 ? 48.7 sscclkout, xin = 48 mhz sscoff sel1:0 = 10 23.7 ? 24.3 sscclkout, xin = 24 mhz 47.2 ? 48.8 sscclkout, xin = 48 mhz ssc= ?0.5% sel1:0 = 11 23.4 ? 24.6 sscclkout, xin = 24 mhz 46.6 ? 49.4 sscclkout, xin = 48 mhz ssc= ?3.0% sel1:0 = 01 23.8 ? 24.2 clkout, 24 mhz output frequency *1, 2 47.3 ? 48.7 mhz clkout, 48 mhz slew rate *1 t sl 0.8 ? ? v/ns @48 mhz clkout 0.4 v to 2.4 v clock duty cycle *1 45 50 55 % output impedance *1 ?40? ? spread spectrum modulation frequency *1 ? 33 ? khz @48 mhz sscclkout input clock frequency 10 ? 60 mhz stabilization time *1,3 ??2 ms notes: 1. parameters are target of design. not 100% tested in production. 2. cycle to cycle jitter and output frequenc y are included spread spectrum modulation. 3. stabilization time is the time required for the integr ated circuit to obtain phase lock of its input signal after power up.
HD151TS309ARP rev.2, nov. 2002, page 7 of 12 sscclkout (or clkout) tcycle n t = (tcycle n) - (tcycle n+1) ccs tcycle n+1 figure 1 cycle to cycle jitter
HD151TS309ARP rev.2, nov. 2002, page 8 of 12 application information 1. recommended circuit configuration the power supply circuit of the optimal performance on the application of a system should refer to fig. 2. vdd decoupling is important to both reduce jitter and emi radiation. the c1 decoupling capacitor should be placed as close to the vdd pi n as possible, otherwise the increased trace inductance will negate its decoupling capability. the c2 decoupling cap acitor shown should be a tantalum type. 8 1 7 sscclkout clkout 6 sel0 sel1 5 2 3 4 xin xout r2 r1 c1 c2 gnd gnd gnd vdd (crystal or reference input) (crystal or not connection) notes: c1 = high frequency supply decoupling capacitor. (0.1 f recommended) c2 = low frequency supply decoupling capacitor. (22 f tantalum type recommended) r1, r2 = match value to line impedance. (22 ? reference value) figure 2 recommended circuit configuration
HD151TS309ARP rev.2, nov. 2002, page 9 of 12 2. example board layout configuration 1 7 6 5 3 2 4 22 ? crystal connection or reference input crystal connection or not connection sscclkout 22 ? clkout p g g g 0.1 f 22 f fb vdd (+3.3 v supply) g note: via to gnd plane r1, r2 = match value to line impedance. fb = ferrite bead. (22 ? reference value) figure 3 example board layout
HD151TS309ARP rev.2, nov. 2002, page 10 of 12 3. example of ts300 emi solution ic?s application ts30x t s 3 0 x system bus s y s t e m b u s memory m e m o r y graphics g r a p h i c s system cont. s y s t e m c o n t . ssc s s c clkout c l k o u t spread spectrum s p r e a d s p e c t r u m modulated clock m o d u l a t e d c l o c k cpu & asic c p u & a s i c xtal x t a l ref. r e f . clock c l o c k xin x i n xout x o u t 3.3 v cmos level ref. clock 3 . 3 v c m o s l e v e l r e f . c l o c k fig 4 ref. clock input example ts30x t s 3 0 x system bus s y s t e m b u s memory m e m o r y graphics g r a p h i c s system cont. s y s t e m c o n t . ssc s s c clkout c l k o u t spread spectrum s p r e a d s p e c t r u m modulated clock m o d u l a t e d c l o c k cpu & asic c p u & a s i c xin x i n xout x o u t xtal x t a l fig 5 xtal ref. clock input example
HD151TS309ARP rev.2, nov. 2002, page 11 of 12 package dimensions hitachi code jedec jeita mass (reference value) fp-8dc conforms ? 0.085 g *dimension including the plating thickness base material dimension 1.75 max 4.90 0.25 0.15 0 ? ? 8 ? m 8 5 1 4 1.27 3.95 0.40 0.06 *0.42 0.08 5.3 max 0.75 max 0.14 + 0.11 ? 0.04 0.20 0.03 *0.22 0.03 0.60 + 0.67 ? 0.20 6.10 + 0.10 ? 0.30 1.08 as of july, 2002 unit: mm
HD151TS309ARP rev.2, nov. 2002, page 12 of 12 disclaimer 1. hitachi neither warrants nor grants licenses of any rights of hitachi?s or any third party?s patent, copyright, trademark, or other intellectual property rights for information contained in this document. hitachi bears no responsibility for problems that may arise with third party?s rights, including intellectual property rights, in connection with use of the information contained in this document. 2. products and product specifications may be subject to change without notice. confirm that you have received the latest product standards or specifi cations before final design, purchase or use. 3. hitachi makes every attempt to ensure that its products are of high quality and reliability. however, contact hitachi?s sales office before using the product in an application that demands especially high quality and reliability or where its failure or malfunc tion may directly threaten human life or cause risk of bodily injury, such as aerosp ace, aeronautics, nuclear power, co mbustion control, transportation, traffic, safety equipment or me dical equipment for life support. 4. design your application so that the product is used within the ranges guaranteed by hitachi particularly for maximum rating, operating supply voltage rang e, heat radiation characteristics, installation conditions and other characteristics. hitachi bears no responsibility for failure or damage when used beyond the guaranteed ranges. ev en within the guaranteed ranges, consider normally foreseeable failure rates or failure modes in semiconductor de vices and employ systemic measures such as fail- safes, so that the equipment incorporating hitachi product does not cause bodily injury, fire or other consequential damage due to op eration of the hitachi product. 5. this product is not designed to be radiation resistant. 6. no one is permitted to reproduce or duplicate, in any form, the whole or part of this document without written approval from hitachi. 7. contact hitachi?s sales office fo r any questions regarding this document or hitachi semiconductor products. sales offices hitachi, ltd. semiconductor & integrated circuits nippon bldg., 2-6-2, ohte-machi, chiyoda-ku, tokyo 100-0004, japan tel: (03) 3270-2111 fax: (03) 3270-5109 copyright ? hitachi, ltd., 2002. all rights reserved. printed in japan. hitachi asia ltd. hitachi tower 16 collyer quay #20-00 singapore 049318 tel : <65>-6538-6533/6538-8577 fax : <65>-6538-6933/6538-3877 url : http://semiconductor.hitachi.com.sg url http://www.hitachisemiconductor.com/ hitachi asia ltd. (taipei branch office) 4/f, no. 167, tun hwa north road hung-kuo building taipei (105), taiwan tel : <886>-(2)-2718-3666 fax : <886>-(2)-2718-8180 telex : 23222 has-tp url : http://semiconductor.hitachi.com.tw hitachi asia (hong kong) ltd. group iii (electronic components) 7/f., north tower world finance centre, harbour city, canton road tsim sha tsui, kowloon hong kong tel : <852>-2735-9218 fax : <852>-2730-0281 url : http://semiconductor.hitachi.com.hk hitachi europe gmbh electronic components group dornacher str 3 d-85622 feldkirchen postfach 201, d-85619 feldkirchen germany tel: <49> (89) 9 9180-0 fax: <49> (89) 9 29 30 00 hitachi europe ltd. electronic components group whitebrook park lower cookham road maidenhead berkshire sl6 8ya, united kingdom tel: <44> (1628) 585000 fax: <44> (1628) 778322 hitachi semiconductor (america) inc. 179 east tasman drive san jose,ca 95134 tel: <1> (408) 433-1990 fax: <1>(408) 433-0223 for further information write to: colophon 7.0

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